JPH0423331U - - Google Patents
Info
- Publication number
- JPH0423331U JPH0423331U JP1990065306U JP6530690U JPH0423331U JP H0423331 U JPH0423331 U JP H0423331U JP 1990065306 U JP1990065306 U JP 1990065306U JP 6530690 U JP6530690 U JP 6530690U JP H0423331 U JPH0423331 U JP H0423331U
- Authority
- JP
- Japan
- Prior art keywords
- motherboard
- output
- connector
- delay
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009434 installation Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Pulse Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990065306U JPH0423331U (en]) | 1990-06-20 | 1990-06-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990065306U JPH0423331U (en]) | 1990-06-20 | 1990-06-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0423331U true JPH0423331U (en]) | 1992-02-26 |
Family
ID=31597018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990065306U Pending JPH0423331U (en]) | 1990-06-20 | 1990-06-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0423331U (en]) |
-
1990
- 1990-06-20 JP JP1990065306U patent/JPH0423331U/ja active Pending
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